The increases in the operating frequency and projected die size of CMOS circuits have led to the proposal of wireless interconnects based on on-chip antennas. On-chip antennas can provide a high speed alternative to a conventional wired interconnection system through use of RF communications which travel over the air at nearly the speed of light. The on-chip antennas can facilitate wireless communications both within a single integrated circuit (IC), such as from one side of a chip to the other side, as well as between a plurality of IC's each having on-chip antennas and related communication circuitry.
A challenge for on-chip antennas is achieving an adequate signal-to-noise ratio for received signals. Electromagnetic interference (EMI), or noise, can be generated near IC's due to nearby devices and within the IC's themselves due to on-chip devices sharing the same substrate as the on-chip antenna(s). For instance, modern integrated circuits can include billions of switching transistors which all generate switching noise. Such noise can interfere with devices sending RF signals, or more importantly for devices receiving RF signals, due to lower received signal levels as compared to transmitted signal levels. The coupled noise can mask the RF signals or cause errors in signal data streams. Unfortunately, the dominant mechanisms, generators and nature of noise coupling between the circuit devices and on-chip antennas have not been well understood.